1. Field of the Invention
The invention relates to realizing high Q inductors and more particularly to realizing high Q inductors for on-chip input matching of microwave monolithic integrated low noise amplifiers or output matching networks for power amplifiers.
2. Description of the Related Art
Off chip noise tuning for Low Noise Amplifiers (LNAs) is a tedious activity and has the problem with repeatability, though its final noise figure can be lower since the Q of off-chip inductors is higher. Similarly, on-chip output matching for power amplifiers (PAs) is also desirable from a manufacturing point of view, but results in additional loss due to the low Q of on-chip inductors, considering the low Q of LNAs. Most off-chip matching will require additional external components, while it is, of course, far more desirable to have complete on-chip noise matching. The use of low cost plastic packages introduces undesired effects which make the requirement for a more robust design even more difficult to achieve. Most of the present designs in the open literature lack robustness which drives manufacturers to select a more expensive off-chip matching approach. Another important challenge in microwave monolithic integrated circuit (MMIC) design is the reduction of the number of inductors used on-chip. Other components, like resistors and capacitors, which require less area should be used in place of inductors whenever possible.
Most of the past solutions on input noise matching lack robustness. Therefore, manufacturers usually preferred off-chip matching for better control over the overall noise figure. An example is the circuit of FIG. 1, where the noise match 10 is done off-chip. However, off-chip noise tuning is an expensive and tedious process in which numerous iterations of printed circuit board (PCB) modifications were needed, especially if the inductance is realized off-chip. Some of the past solutions include physical cutting of the PCB in order to achieve the desired inductance value of L1 and L2 as shown in FIG. 2. FIG. 2 depicts an inductor 21 and its corresponding implementation as a PCB transmission line 22, with terminals 1 and 2 for both. For the best possible noise match the S11 and Sopt (optimum noise position) are a conjugate match, which is equal in magnitude but opposite in phase. Craninckx and Steyaert (Jan Craninckx and Michel S. J. Steyaert, "A 1.8-GHz CMOS Low-Phase-Noise Voltage-Controlled Oscillator with Prescaler", pp. 1474-1482, IEEE Journal of Solid-State Circuits, Vol. 30, NO. 12, December 1995) have suggested a method of using bondwire to create the desired high Q inductor, but for low phase noise voltage controlled oscillator applications.
U.S. Pat. No. 5,640,127 (Metz) discloses the use of bondwire for an inductor, but for input protection for a high bandwidth amplifier, which differs from the invention. U.S. Pat. No. 5,221,908 (Katz) also describes the use of bond wire for an inductor as a gate impedance, but in the context of a distortion equalizer.